Two Design Procedures for a Time-Delay Control System

Abstract

This paper deals with two design procedures of a control system for a proportional or integrator time-delay plant using a suitable placement of the closed-loop poles to have a small response time, a zero or small overshoot and a given magnitude ratio of the controller output to a step reference or disturbance. To obtain these performances, the both controller design procedures provide a unique solution for the closed-loop pole placement, such that the open-loop system is of simple integrator type (with one pole in origin) to have zero steady-state error to a step input. Three numerical examples for time-delay plants of proportional and integrator type are given to illustrate the effectiveness of the proposed control procedures.